NXP Semiconductors /LPC408x_7x /MCPWM /INTF_SET

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Interpret as INTF_SET

Description

Interrupt flags set address

Fields

ILIM0_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
IMAT0_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
ICAP0_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
RESERVED	Reserved.
ILIM1_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
IMAT1_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
ICAP1_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
RESERVED	Reserved.
ILIM2_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
IMAT2_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
ICAP2_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
RESERVED	Reserved.
ABORT_F_SET	Writing a one sets the corresponding bit in the INTF register, thus possibly simulating hardware interrupt.
RESERVED	Reserved.

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